Future of Computers

Transistors Reinvented Using New 3-D Structure

Future of Computers:

ScienceDaily (May 5, 2011) — Intel Corporation has announced a significant breakthrough in the evolution of the transistor, the microscopic building block of modern electronics. For the first time since the invention of silicon transistors over 50 years ago, transistors using a three-dimensional structure will be put into high-volume manufacturing. Intel will introduce a revolutionary 3-D transistor design called Tri-Gate, first disclosed by Intel in 2002, into high-volume manufacturing at the 22-nanometer (nm) node in an Intel chip codenamed “Ivy Bridge.” A nanometer is one-billionth of a meter.

The three-dimensional Tri-Gate transistors represent a fundamental departure from the two-dimensional planar transistor structure that has powered not only all computers, mobile phones and consumer electronics to-date, but also the electronic controls within cars, spacecraft, household appliances, medical devices and virtually thousands of other everyday devices for decades.

“Intel’s scientists and engineers have once again reinvented the transistor, this time utilizing the third dimension,” said Intel President and CEO Paul Otellini. “Amazing, world-shaping devices will be created from this capability as we advance Moore’s Law into new realms.”

Scientists have long recognized the benefits of a 3-D structure for sustaining the pace of Moore’s Law as device dimensions become so small that physical laws become barriers to advancement. The key to this latest breakthrough is Intel’s ability to deploy its novel 3-D Tri-Gate transistor design into high-volume manufacturing, ushering in the next era of Moore’s Law and opening the door to a new generation of innovations across a broad spectrum of devices.

Moore’s Law is a forecast for the pace of silicon technology development that states that roughly every 2 years transistor density will double, while increasing functionality and performance and decreasing costs. It has become the basic business model for the semiconductor industry for more than 40 years.

Unprecedented Power Savings and Performance Gains

Intel’s 3-D Tri-Gate transistors enable chips to operate at lower voltage with lower leakage, providing an unprecedented combination of improved performance and energy efficiency compared to previous state-of-the-art transistors. The capabilities give chip designers the flexibility to choose transistors targeted for low power or high performance, depending on the application.

The 22nm 3-D Tri-Gate transistors provide up to 37 percent performance increase at low voltage versus Intel’s 32nm planar transistors. This incredible gain means that they are ideal for use in small handheld devices, which operate using less energy to “switch” back and forth. Alternatively, the new transistors consume less than half the power when at the same performance as 2-D planar transistors on 32nm chips.

“The performance gains and power savings of Intel’s unique 3-D Tri-Gate transistors are like nothing we’ve seen before,” said Mark Bohr, Intel Senior Fellow. “This milestone is going further than simply keeping up with Moore’s Law. The low-voltage and low-power benefits far exceed what we typically see from one process generation to the next. It will give product designers the flexibility to make current devices smarter and wholly new ones possible. We believe this breakthrough will extend Intel’s lead even further over the rest of the semiconductor industry.”

Continuing the Pace of Innovation — Moore’s Law

Transistors continue to get smaller, cheaper and more energy efficient in accordance with Moore’s Law — named for Intel co-founder Gordon Moore. Because of this, Intel has been able to innovate and integrate, adding more features and computing cores to each chip, increasing performance, and decreasing manufacturing cost per transistor.

Sustaining the progress of Moore’s Law becomes even more complex with the 22nm generation. Anticipating this, Intel research scientists in 2002 invented what they called a Tri-Gate transistor, named for the three sides of the gate. This announcement follows further years of development in Intel’s highly coordinated research-development-manufacturing pipeline, and marks the implementation of this work for high-volume manufacturing.

The 3-D Tri-Gate transistors are a reinvention of the transistor. The traditional “flat” two-dimensional planar gate is replaced with an incredibly thin three-dimensional silicon fin that rises up vertically from the silicon substrate. Control of current is accomplished by implementing a gate on each of the three sides of the fin — two on each side and one across the top — rather than just one on top, as is the case with the 2-D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the “on” state (for performance), and as close to zero as possible when it is in the “off” state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance).

Just as skyscrapers let urban planners optimize available space by building upward, Intel’s 3-D Tri-Gate transistor structure provides a way to manage density. Since these fins are vertical in nature, transistors can be packed closer together, a critical component to the technological and economic benefits of Moore’s Law. For future generations, designers also have the ability to continue growing the height of the fins to get even more performance and energy-efficiency gains.

“For years we have seen limits to how small transistors can get,” said Moore. “This change in the basic structure is a truly revolutionary approach, and one that should allow Moore’s Law, and the historic pace of innovation, to continue.”

World’s First Demonstration of 22nm 3-D Tri-Gate Transistors

The 3-D Tri-Gate transistor will be implemented in the company’s upcoming manufacturing process, called the 22nm node, in reference to the size of individual transistor features. More than 6 million 22nm Tri-Gate transistors could fit in the period at the end of this sentence.

Intel has demonstrated the world’s first 22nm microprocessor, codenamed “Ivy Bridge,” working in a laptop, server and desktop computer. Ivy Bridge-based Intel® Core™ family processors will be the first high-volume chips to use 3-D Tri-Gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year.

This silicon technology breakthrough will also aid in the delivery of more highly integrated Intel® Atom™ processor-based products that scale the performance, functionality and software compatibility of Intel® architecture while meeting the overall power, cost and size requirements for a range of market segment needs.

Email or share this story:

Story Source:

The above story is reprinted (with editorial adaptations by ScienceDaily staff) from materials provided by Intel Corporation.


Disclaimer: Views expressed in this article do not necessarily reflect those of ScienceDaily or its staff.

The 22nm 3D tri-gate transistor: This image shows the vertical fins of Intel’s revolutionary tri-gate transistors passing through the gates. (Credit: Image courtesy of Intel Corporation)

Revolutionary New Paper Computer Shows Flexible Future for Smartphones and Tablets

ScienceDaily (May 4, 2011) — The world’s first interactive paper computer is set to revolutionize the world of interactive computing.

“This is the future. Everything is going to look and feel like this within five years,” says creator Roel Vertegaal, the director of Queen’s University Human Media Lab. “This computer looks, feels and operates like a small sheet of interactive paper. You interact with it by bending it into a cell phone, flipping the corner to turn pages, or writing on it with a pen.”

The smartphone prototype, called PaperPhone is best described as a flexible iPhone — it does everything a smartphone does, like store books, play music or make phone calls. But its display consists of a 9.5 cm diagonal thin film flexible E Ink display. The flexible form of the display makes it much more portable that any current mobile computer: it will shape with your pocket.

Dr. Vertegaal will unveil his paper computer on May 10 at 2 pm at the Association of Computing Machinery’s CHI 2011 (Computer Human Interaction) conference in Vancouver — the premier international conference of Human-Computer Interaction.

Being able to store and interact with documents on larger versions of these light, flexible computers means offices will no longer require paper or printers.

“The paperless office is here. Everything can be stored digitally and you can place these computers on top of each other just like a stack of paper, or throw them around the desk” says Dr. Vertegaal.

The invention heralds a new generation of computers that are super lightweight, thin-film and flexible. They use no power when nobody is interacting with them. When users are reading, they don’t feel like they’re holding a sheet of glass or metal.

An article on a study of interactive use of bending with flexible thinfilm computers is to be published at the conference in Vancouver, where the group is also demonstrating a thinfilm wristband computer called Snaplet.

The development team included researchers Byron Lahey and Win Burleson of the Motivational Environments Research Group at Arizona State University (ASU), Audrey Girouard and Aneesh Tarun from the Human Media Lab at Queen’s University, Jann Kaminski and Nick Colaneri, director of ASU’s Flexible Display Center, and Seth Bishop and Michael McCreary, the VP R&D of E Ink Corporation.

Professor Roel Vertegaal’s PaperPhone is best described as a flexible iPhone. (Credit: Image courtesy of Queen’s University)

Graphene’s Varying Conductivity Levels Pinpointed

ScienceDaily (May 3, 2011) — Graphene is often touted as the latest “wonder material,” and may be the electronics industry’s next great hope for the creation of extremely fast electronic devices. Researchers at North Carolina State University have found one of the first roadblocks to utilizing graphene by proving that its conductivity decreases significantly when more than one layer is present.

Graphene’s structure is what makes it promising for electronics. Because of the way its carbon atoms are arranged, its electrons are very mobile. Mobile electrons mean that a material should have high conductivity. But NC State physicist Dr. Marco Buongiorno-Nardelli and NC State electrical and computer engineer Dr. Ki Wook Kim wanted to find a way to study the behavior of “real” graphene and see if this was actually the case.

“You can talk about the electronic structure of graphene, but you must consider that those electrons don’t exist alone in the material,” Buongiorno-Nardelli says. “There are impurities, and most importantly, there are vibrations present from the atoms in the material. The electrons encounter and interact with these vibrations, and that can affect the material’s conductivity.”

Buongiorno-Nardelli, Kim and graduate students Kostya Borysenko and Jeff Mullen developed a computer model that would predict the actual conductivity of graphene, both as a single layer and in a bilayer form, with two layers of graphene sitting on top of one another. It was important to study the bilayer model because actual electronic devices cannot work with only a single layer of the material present.

“You cannot make a semiconductor with just one graphite layer,” Buongiorno-Nardelli explains. “To make a device, the conductive material must have a means by which it can be turned off and on. And bilayer provides such ability.”

With the help of the high performance computers at Oak Ridge National Laboratories, the NC State team discovered both good and bad news about graphene. Their results appear as an Editor’s Suggestion in the April 15 edition of Physical Review B.

With a single layer of graphene, the mobility — and therefore conductivity — shown by the researchers’ simulations turned out to be much higher than they had originally thought. This good news was balanced, however, by the results from the bilayer state.

“We expected that the electrons’ conductivity in bilayer graphene could be somewhat worse, due to the ways in which the vibrations from the atoms in each individual layer interact with one another,” Mullen says. “Surprisingly, we found that the mobility of electrons in bilayer graphene is roughly an order of magnitude lower than in a single graphene sheet.”

“The reduction is substantial, but even this reduced number is higher than in many conventional semiconductors,” Borysenko adds.

Buongiorno-Nardelli says that the NC State researchers are turning their attention to remedying this problem.

“If we put the graphene on a substrate that can ‘siphon off’ some of the heat generated by the electric current, the crystal vibrations will decrease and the mobility will increase. Those are our next steps — running the simulations with graphene and substrates that have this property.”

The research was funded by the U.S. Department of Energy and the DARPA-CERA program.


Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s